This invention pertains to insulated-gate field-effect transistors (IGFET) and, more specifically, to a process for fabrication of IGFETs with a high speed response in high-density integrated circuits.
To achieve high integration density and a high speed response, both the horizontal as well as the vertical dimensions of the IGFET transistors must be reduced (i.e.--the Scaling Principle). In particular, it is necessary to decrease the depth of the drain and source junctions in the substrate. In the usual commercially available IGFET, the use of very thin junctions in general also involves negative consequences, e.g.--it actually increases the layer resistance of the active regions and decreases the reliability of the contacts between these regions and the related electrodes.
To avoid such difficulties, the embodiment of IGFET has been proposed with active source and drain regions formed on the substrate surface, instead of inside thereof. A structure of this type may be achieved by means of selective epitaxy, as is, for example, described in Italian Patent Application No. 21968 A/84 of the inventor herself, which, however, requires the use of dedicated reactors, capable of making epitaxial films grow, in a reproducible way, from the gaseous phase, and the use of selective etching to define the monocrystalline regions grown. The reactors employed are very costly; moreover, the temperature at which epitaxy is achieved is relatively high (1150.degree. C.).
A variant of the process is also described in the previously cited patent application, wherein the active source and drain regions are obtained by recrystallization, by means of a laser, of a layer of deposited polycrystalline silicon, instead of by epitaxial growth. Nevertheless, recrystallization by means of a laser is not industrially advantageous for large-scale production.